dc.contributor.author | Puttamreddy, Udhayasimha | |
dc.date.accessioned | 2014-10-20T17:14:32Z | |
dc.date.available | 2014-10-20T17:14:32Z | |
dc.date.issued | 2014-10-20 | |
dc.identifier.uri | http://hdl.handle.net/10222/55951 | |
dc.description.abstract | This work presents an SC filter design technique based on a CMOS inverter. The proposed technique is demonstrated by the design of the sixth-order Follow the Leader Feedback (FLF) Chebyshev low-pass filter. This technique resulted in filters with reduced sensitivities compared to the cascade realization. This design was simulated using the TSMC65nm technology at a low supply voltage of 0.7V. The characteristics of the designed filter are 1dB pass band ripple with a 3dB bandwidth of 0.8MHz and an attenuation of 40dB with an ultra low power consumption of only 1.8μW which is far less compared to the existing op-amp based filter designs. Also, the Dynamic Threshold MOS (DTMOS) integrator for ultra-low supply voltage (sub-threshold operation) is proposed and a low frequency SC filter is realized for biomedical application where ultra low-voltage operation and ultra low power consumption is an important factor. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Switched-capacitor, dynamic threshold MOS, Follow-the-Leader Feedback | en_US |
dc.title | Ultra Low-voltage Multiple-loop Feedback Switched-capacitor Filters | en_US |
dc.date.defence | 2014-10-08 | |
dc.contributor.department | Department of Electrical & Computer Engineering | en_US |
dc.contributor.degree | Master of Applied Science | en_US |
dc.contributor.external-examiner | William Phillips | en_US |
dc.contributor.graduate-coordinator | Ponomarenko, Sergey | en_US |
dc.contributor.thesis-reader | Jason Gu | en_US |
dc.contributor.thesis-supervisor | El-Masry, Ezz I. | en_US |
dc.contributor.ethics-approval | Not Applicable | en_US |
dc.contributor.manuscripts | Not Applicable | en_US |
dc.contributor.copyright-release | Not Applicable | en_US |