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dc.contributor.authorZhang, Xuguang.en_US
dc.date.accessioned2014-10-21T12:37:34Z
dc.date.available2004
dc.date.issued2004en_US
dc.identifier.otherAAINQ93285en_US
dc.identifier.urihttp://hdl.handle.net/10222/54634
dc.descriptionModern low-voltage (LV) submicron CMOS technologies with large second or higher order effects put great challenge in designing high performance analog building blocks for increasingly popularized portable battery-powered applications. Body driven (BD) MOSFET is equivalent to a depletion type device and compatible with standard CMOS technology. Although BD technique has great potential to achieve LV operation, few practical BD circuits have been proposed due to two reasons: (1) BD technique is a new research area; (2) MOSFET models are optimized for conventional gate-driven (GD) MOSFETs. Their accuracy in simulating BD MOSFET has not been investigated. So far, no research has been carried out on BD MOSFET modeling. The objective of this Ph.D. work is to exploit the potentials of the BD technique by (1) carrying out a comprehensive study on the industry-standard model's performance in simulating body-driven MOSFET; (2) presenting solutions and an improved model for BD MOSFET that improve the simulation accuracy; (3) predicting the future prospects of the body-driven device performance; (4) proposing and implementing novel high performance BD analog signal processing building blocks for IV operation. Specifically, a novel 1 V/1.5 V regulated current mirror (CM) is developed based on BD technique and active feedback scheme. An optimum design methodology is formulated based on the complete analysis of the input/output characteristics, system DC current transfer error and pole/zero locations. A 1.8 V differential BD operational transconductance amplifier (OTA) is also presented that achieves enhanced linearity as well as relieves the conventional trade-off between the input range and tuning range. Detailed analysis addressing the design concerns is provided. Finally, a 3rd order elliptic low-pass filter is implemented by using the proposed OTA and synthesized from a doubly terminated passive LC ladder. It features high linearity, wide signal swing and tuning range, as well as good dynamic range.en_US
dc.descriptionThesis (Ph.D.)--Dalhousie University (Canada), 2004.en_US
dc.languageengen_US
dc.publisherDalhousie Universityen_US
dc.publisheren_US
dc.subjectEngineering, Electronics and Electrical.en_US
dc.titleLow voltage CMOS analog circuit design using body-driven techniques.en_US
dc.typetexten_US
dc.contributor.degreePh.D.en_US
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